A timing delay incorporated into the operation of Track Circuits where there
is a transition between SSIA first generation processor based system for controlling the Interlocking between Points and Signals, as well as communication with lineside Signalling Functio... More and RRIA relay based interlocking system controlled from a route setting panel. Usually refers to a Free-Wired Interlocking. More track circuited areas, and an incorrect
track sequence of circuit clearance could give rise to a hazardous locking
releaseThe removal of Locking on a function, for example, the removal of Route Locking or the unlocking of a function such as a Ground Frame. More.